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NJW4181 - 1 - ver.2013-04-15 high voltage very low current consumption io=100ma regulator ? general description ? package outline the NJW4181 is a high input voltage and low current consumption 100ma series regulator low current consumption iq=9 a and small package. it has two package lineup. sot-89 is able to direct replace to 3-terminal 78l series. eson6, tiny dfn package, corresponds to a demand on miniaturization of sensor application and so on. due to the low current consumption of 9 a, the NJW4181 is suitable for light load and continuously running applications such as power management microprocessor, rtc, protection circuit, security system and so on. ? features ? wide operating voltage range 35v (max.) ? low current consumption 9a (typ.) ? correspond to low esr capacitor (mlcc) ? output current i o (min.)=100ma ? high precision output v o 1.0% ? internal thermal overload protection ? internal over current protection ? internal reverse current protection ? package outline dfn6-g1( eson6-g1), sot-89-3 ? product classification device name version on/off function package status NJW4181kg1-xxa a yes dfn6-g1(eson6-g1) plan NJW4181u2-xxa a yes sot-89-5 plan NJW4181kg1-xxb b - dfn6-g1(eson6-g1) NJW4181u3-xxb b - sot-89-3 xx=output voltage ex) 33=3.3v 05=5.0v ? pin configuration 1. n.c. 1. v out 2. gnd 2. gnd 3. n.c. 3. v in 4. v in 5. n.c. 6. v out NJW4181kg1 NJW4181u3 ? input voltage range v o 3v: v in = +4.7v to +35v 3v < v o 5v v in = v o +1.7v to +35v v o > 5v: v in = v o +2.0v to +35v 1 2 3 NJW4181 1 2 3 6 5 4 NJW4181kg1 NJW4181u3 http://www..net/ datasheet pdf - http://www..net/
NJW4181 - 2 - ver.2013-04-15 ? block diagram ? output voltage rank list dfn6-g1(eson6-g1) sot-89-3 device name v out device name v out NJW4181kg1-25b 2.5v NJW4181u3-25b 2.5v NJW4181kg1-33b 3.3v NJW4181u3-33b 3.3v NJW4181kg1-05b 5.0v NJW4181u3-05b 5.0v NJW4181kg1-08b 8.0v NJW4181u3-08b 8.0v NJW4181kg1-15b 15.0v NJW4181u3-12b 12.0v NJW4181u3-15b 15.0v ? absolute maximum ratings (ta=25 c) parameter synbol ratings unit input voltage v in -0.3 to +40 v output voltage v out -0.3 ~ v in +7 17 (vo 5.0v) -0.3 ~ +17 (vo>5.0v) v 420 (*1) dfn6-g1 (eson6-g1) 1200 (*2) 625 (*3) power dissipation p d sot-89-3 2400 (*4) mw junction temperature tj -40 to +150 c operating temperature topr -40 to +85 c storage temperature tstg -40 to +150 c (*1): mounted on glass epoxy board (101.5 114.5 1.6mm: based on eia/jedec standard, 2layers fr-4, with exposed pad) (*2): mounted on glass epoxy board (101.5 114.5 1.6mm: based on eia/jedec standard, 4layers fr-4, with exposed pad) (4layers: applying 99.5 99.5mm inner cu area and a thermal via hole to a board based on jedec standard jesd51-5) (*3): mounted on glass epoxy board. (76.2 114.3 1.6mm:based on eia/jdec standard size, 2layers, cu area 100mm 2 ) (*4): mounted on glass epoxy board. (76.2 114.3 1.6mm:based on eia/jdec standard, 4layers) (4layers: applying 74.2 74.2mm inner cu area and a thermal via hole to a board based on jedec standard jesd51-5) http://www..net/ datasheet pdf - http://www..net/ NJW4181 - 3 - ver.2013-04-15 ? electrical characteristics (unless otherwise specified, v in =vo+2.3v(3v < v o 5v: v in = vo+2.0v, v o 3v: v in = 5.0v) c in = 0.1 f, c o = 2.2 f, ta= 25c parameter symbol test condition min. typ. max. unit output voltage v o i o =30ma -1.0% - +1.0% v quiescent current i q i o =0ma - 9 20 a output current io v o 0.9 100 - - ma line regulation ? v o / ? v in v o 3v: v in = +5.0v to +35v 3v < v o 5v: v in = v o +2.0v to +35v v o > 5v: v in = v o +2.3v to +35v, io=30ma - - 0.05 %/v load regulation ? v o / ? i o i o =0ma to 100ma - - 0.005 %/ma average temperature coefficient of output voltage ? v o / ? ta ta = 0 t o 8 5 c, i o =10ma - 100 - ppm/ c v in =0v,vo=5v(v o ? 5.0v) - 0 1 sink current under reverse current protection operating i reverse v in =0v,vo=15v(v o ? 5.0v) 100 200 a v o 3v 4.7 - 35 3v < v o 5v v o +1.7 - 35 input voltage v in v o > 5v v o +2.0 - 35 v the above specification is a common spec ification for all output voltages. therefore, it may be different from the indivi dual specification for a specific output voltage. http://www..net/ datasheet pdf - http://www..net/ NJW4181 - 4 - ver.2013-04-15 ? power dissipation vs. ambient temperature NJW4181kg1 power dissipation (topr=-40~+85c,tj=150c) 0 200 400 600 800 1000 1200 1400 -50 -25 0 25 50 75 100 temperature ta(c) power dissipation pd(mw) on 4 layers board (101.5114.51.6mm) on 2 layers board (101.5114.51.6mm) NJW4181u3 power dissipation (topr=-40~+85c,tj=150c) 0 500 1000 1500 2000 2500 -50 -25 0 25 50 75 100 temperature ta(c) power dissipation pd(mw) on 4 layers board (114.376.21.6mm) on 2 layers board (114.376.21.6mm) http://www..net/ datasheet pdf - http://www..net/ NJW4181 - 5 - ver.2013-04-15 ? test circuit NJW4181-b v in v in v out gnd 0.1 f i in i out v out v a (ceramic) 2.2 f ? typical application NJW4181-b v in v out gnd 0.1 f v out v in 2.2 f *input capacitor c in input capacitor c in is required to prevent oscillation and reduce po wer supply ripple for applications when high power supply impedance or a long power supply line. therefore, use the recommended c in value (refer to conditions of electr ic characteristic) or larger and should connect between gnd and the v in pin as shortest path as possible to avoid the problem. *output capacitor c o output capacitor (c o ) will be required for a phase compensation of the internal error amplifier. the capacitance and the equivalent se ries resistance (esr) influence to stable operation of the regulator. use of a smaller c o may cause excess output noise or oscillation of the regulator due to lack of the phase compensation. on the other hand, use of a larger c o reduces output noise and ripple output, and also improves output transient response when rapid load change. therefore, use the recommended c o value (refer to conditions of electric characteristic) or larger and s hould connect between gnd and the v out pin as shortest path as possible for stable operation in addition, you should consider va ried characteristics of capacitor (a frequency characterist ic, a temperature characteristic, a dc bias characteristic and so on) and unevenness peculiar to a capacitor supplier enough. when selecting c o, recommend that have withstand voltage margin against output voltage and superior temperature characteristic. *reverse current protection NJW4181 is built-in a reverse current protection. this circuit restrains reverse current from the v o pin to the v in pin when the input voltage is less than the output voltage. in case of the voltage rank 5.0v or below, reverse voltage differential between output and input should keep v in +7v or less, to prevent ic breaking due to huge reverse current. and also, the absolute maximum ratings of the vo pin (17v) should not be exceeded. http://www..net/ datasheet pdf - http://www..net/ NJW4181 - 6 - ver.2013-04-15 NJW4181_5.0v output voltage vs. input voltage 0 1 2 3 4 5 6 0 10203040 input voltage [v] output voltage [v] co = 2.2uf cin = 0.1uf io = 30ma NJW4181_5.0v output voltage vs. output current 0 1 2 3 4 5 6 0 50 100 150 200 250 300 output current [ma] output voltage [v] -50 ? 25 ? 100 ? 150 ? vin = 7.0v cin = 0.1uf co = 2.2uf NJW4181_5.0v gnd current vs. output current 0 2 4 6 8 10 0 50 100 150 200 output current [ma] gnd current [ma] vin = 7.0v co = 2.2uf cin = 0.1uf NJW4181_5.0v quiescent current vs. input voltage 0 3 6 9 12 15 0 10203040 input voltage [v] quiescent current [a] co = 2.2uf cin = 0.1uf NJW4181_5.0v load regulation vs. output current -20 -16 -12 -8 -4 0 4 8 12 16 20 0 50 100 150 200 output current [ma] load regulation [mv] vin = 7.0v co = 2.2uf cin = 0.1uf NJW4181_5.0v line regulation vs input voltage 0 5 10 15 20 25 30 7172737 input voltage [v] line regulation [mv] co = 2.2uf cin = 0.1uf io = 30ma NJW4181-05 typical characteristics http://www..net/ datasheet pdf - http://www..net/ NJW4181 - 7 - ver.2013-04-15 NJW4181_5.0v dropout voltage vs. output current 0 1 2 3 0 50 100 150 200 output current [ma] dropout voltage [v] vin = 7.0v co = 2.2uf cin = 0.1uf NJW4181_5.0v peak output current vs. input voltage 0 50 100 150 200 250 300 0 10203040 input voltage [v] peak output current [ma] vin = 7.0v co = 2.2uf cin = 0.1uf NJW4181_5.0v short circuit current vs. input voltage 0 20 40 60 80 100 0 10203040 input voltage [v] short circuit current [ma] vin = 7.0v co = 2.2uf cin = 0.1uf NJW4181_5.0v ripple rejection ratio vs. frequency 0 10 20 30 40 50 60 70 80 90 100 10 100 1k 10k 100k frequency [hz] ripple rejection ratio [db] * p v " * p n " * p n " * p n " * p n " vin = 8.0v cin = 0.1uf co = 2.2uf NJW4181_5.0v ripple rejection ratio vs. output current 0 25 50 75 100 0 0 0 1 10 100 1k output current [ma] ripple rejection ratio [db] vin = 8.0v cin = 0.1uf co = 2.2uf NJW4181_5.0v equlvalent serise resistance vs. output current 0.01 0.1 1 10 100 0.001 0.1 10 1000 output current [ma] equivalent series resistance [ ? ] cin = 0.1uf co = 2.2uf stable region NJW4181-05 typical characteristics http://www..net/ datasheet pdf - http://www..net/ NJW4181 - 8 - ver.2013-04-15 NJW4181_5.0v output voltage vs. temperature 4.8 4.9 5 5.1 5.2 -50 -25 0 25 50 75 100 125 150 temperature [oc] output voltage [v] vin = 7.0v cin = 0.1uf co = 2.2uf io = 30ma NJW4181_5.0v quiescent current vs. temperature 0 3 6 9 12 15 -50 -25 0 25 50 75 100 125 150 temperature [oc] quiescent current [a] vin = 7.0v vin = 35v cin = 0.1uf co = 2.2uf NJW4181_5.0v gnd current vs. temperature 0 2 4 6 8 10 -50 -25 0 25 50 75 100 125 150 temperature [oc] gnd current [ma] vin = 7.0v cin = 0.1uf co = 2.2uf io = 100ma NJW4181_5.0v short circuit current vs. temperature 0 50 100 150 -50 -25 0 25 50 75 100 125 150 175 200 temperature [oc] short circuit current [ma] vin = 7.0v vin = 35v vo = 0v cin = 0.1uf co = 2.2uf NJW4181_5.0v peak output current vs. temperature 0 50 100 150 200 250 300 -50 -25 0 25 50 75 100 125 150 175 200 temperature [oc] peak output current [ma] vin = 7.0v vin = 35v vo = 4.5v cin = 0.1uf co = 2.2uf NJW4181_5.0v load regulation vs. temperature -30 -20 -10 0 10 20 30 -50 -25 0 25 50 75 100 125 150 temperature [oc] load regulation [mv] io = 0ma 30ma io = 0ma 100ma vin = 7.0v cin = 0.1uf co = 2.2uf NJW4181-05 typical characteristics http://www..net/ datasheet pdf - http://www..net/ NJW4181 - 9 - ver.2013-04-15 NJW4181_5.0v line regulation vs. temperature -30 -20 -10 0 10 20 30 40 50 -50 -25 0 25 50 75 100 125 150 temperature [oc] line regulation [mv] io = 0ma io = 30ma io = 100ma vin = 7.0v 35v cin = 0.1uf co = 2.2uf NJW4181_5.0v reverse current vs. temperature 0 0.25 0.5 0.75 1 -50 -25 0 25 50 75 100 125 150 temperature [oc] reverse current [a] vin = 0v vo = 5.0v cin = 0.1uf co = 2.2uf measure at vin NJW4181_5.0v output voltage vs. temperature 0 1 2 3 4 5 6 -50 -25 0 25 50 75 100 125 150 175 200 temperature [oc] output voltage [v] vin = 7.0v cin = 0.1uf co = 2.2uf io = 30ma 36 40 time [ms] 20 24 28 32 481216 0 0.0 2.0 1.0 4.0 3.0 0 6.0 5.0 output voltage [v] 40 20 60 input voltage [v] NJW4181_5.0v input transient response @:ta=25c vin=0 - 35v co=2.2uf(ceramic) io=30ma input voltage output voltage 36 40 time [ms] 20 24 28 32 481216 0 3.5 4.5 4.0 5.5 5.0 0 6.5 6.0 output voltage [v] 40 20 60 input voltage [v] NJW4181_5.0v input transient response @:ta=25c vin=7 - 35v co=2.2uf(ceramic) io=30ma input voltage output voltage NJW4181_5.0v load transient response * o q v u 7 p m u b h f < |